Reporting the Timing Exceptions Being Ignored - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English
Use the -ignored option with the report_exceptions command to list all timing exceptions that the timing engine ignores.
report_exceptions -ignored

To illustrate how this mode works, add the following timing exceptions in addition to those used previously:

set_max_delay 5 -to [get_ports out5]
set_multicycle_path 1 -hold -to [get_cells int21_reg]
set_multicycle_path 2 -setup -to [get_ports out6]
set_false_path -from [get_cells int11_reg] -to [get_cells int20_reg]

These constraints are ignored for one of the following reasons:

  • They are already covered by a higher-priority or more specific constraint
  • They refer to a non-existent path (for example, no physical connection between int11_reg and int20_reg)

After adding these four constraints, the Timing Constraints window looks like the following figure.

Figure 1. Timing Constraints Window

Run report_exceptions -ignored to view which constraints are being ignored and why.

Figure 2. Exceptions Report

The following is displayed in the output:

  • The Status column explains the reason a constraint is ignored
  • The report helps you identify redundancy or conflicts in your constraint file
  • Use this to clean up constraints or refine your timing exception strategy

This mode is especially helpful when working with large or complex designs where overlapping constraints might silently override each other.