The Ram Utilization
report helps you analyze the usage of dedicated RAM blocks such as UltraRAM and block
RAM and distributed RAM primitives. By default, the report considers the entire design
but it can be limited to specific hierarchies using the -cell switch. The report can be generated after synthesis and any
implementation step but is only available from the Tcl command line.
The RAM Utilization report is most effective on memories inferred by Vivado synthesis because you can compare the RTL memory array with the actual physical FPGA implementation.
The report shows the following information:
- The total bit, width, and depth utilization of each memory primitive
- The size of the array and the dimensions (inference only)
- The type of memory
- Optional pipeline usage of the memory (where applicable)
- Power efficiency items such as cascading and enable rate
The report can also be generated in CSV format. This is the preferred method when you need to manage and sort a large amount of data.