You can run the Report Exceptions command at any point after synthesis. Use it to identify and debug timing exceptions in your design.
This report includes the following:
- All timing exceptions that currently affect timing analysis
- All timing exceptions that are set but ignored because they are overridden by other exceptions
The command analyzes timing exceptions in the following order of precedence:
-
set_clock_groups -
set_false_path -
set_max_delay/set_min_delay -
set_multicycle_path
Even though clock groups are not strict timing exceptions, they are included because they can override other exceptions.
What the Report Shows
The report helps you to do the following:
- Identify which exceptions are applied and which are ignored
- Understand if an exception is partially or completely overridden
- Identify what other constraint is overriding a particular exception
- Debug complex exception behavior where multiple constraints interact
Command Modes
The report_exceptions command
supports several modes, including the following:
- Report active exceptions affecting timing
- Report ignored exceptions
- Report timing exception coverage
- Report invalid objects in
-from,-through, or-to - Write only valid exceptions to output file
- Write merged exceptions as interpreted by the timing engine to output file
Important Notes
- If you use the
-from,-through, or-tooptions, the report includes only those exceptions defined with the same combination. - The patterns can differ, but there must be at least one object (cell, net, pin,
or port) that matches in each of the
-from,-through, and-togroups for the tool to recognize it as a valid exception.
For more information about the report_exceptions command line options, refer to the
Vivado
Design Suite Tcl Command Reference Guide (UG835). For more information about
the timing exception priority order, refer to XDC Precedence in the
Vivado Design Suite User Guide: Using
Constraints (UG903).