Report Clock Networks - Report Clock Networks - 2026.1 English - UG906

Launch the Report Clock Network from the Flow Navigator in the Vivado IDE, or by using the Tcl command.

Report Clock Networks provides a tree view of the clock trees in the design. Each clock tree shows the clock network from source to endpoint with the endpoints sorted by type.

Figure 1. Clock Networks

The clock trees have the following options:

• They show clocks defined by the user or ones that are generated automatically by the tool.
• They can report clocks from I/O port to load.
  Note: The full clock tree is only detailed in the GUI form of the report. The text version of this report shows only the name of the clock roots.
• They can help find BUFGs driving other BUFGs.
• They show clocks driving non-clock loads.

A folder contains each primary clock and any generated clocks defined in the design. A separate folder displays each unconstrained clock root.

Use the filter Ports, Nets, Instances, and related buttons to reduce the amount of data displayed in the clock tree. The filter options can be viewed by clicking on the icon.

Figure 2. Clock Networks Filter

Use the following instructions to view a schematic of the clock path:

1. Select an object in the tree.
2. Select the Trace to Source popup command.