RQS_TIMING-201: Add an Output Register to RAM - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English

Adding an output register to a RAM improves the clock-to-out time of the RAM read data path. This gives the place and route tools more flexibility to place the RAM optimally and allows the register to be placed in the fabric instead of the RAM to optimize the critical path.

The synthesis tool can easily infer output registers. These registers must either have a synchronous reset or no reset.