RQS_AMD_NELTIST-1: Extract Registers from SRLs Driven by LUTs - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English

This check generates the SRL_STAGES_TO_REG_INPUT properties on SRL cells that are driven by LUTs (for example, LUT/O -> SRL/D). After you extract registers from the SRL, the register site next to the LUT can be used, which can make timing paths easier to meet.

The check considers the following:

  • Whether an SRL is static or variable. You only extract registers from static SRLs.
  • The net driving the SRL D pin must have a fanout of 1.
  • When the driving LUT is LUT-combined, and one of the LUTs drives an FDC* primitive, register extraction is not performed due to packing limitations.

Use this suggestion in fast designs to help prepare the netlist for higher performance. However, performance drops if too many registers are introduced and register utilization becomes a bottleneck, restricting optimizations later in the tool flow.

Property Value
APPLICABLE_FOR place_design
AUTO 1