Message - Message - 2026.1 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2026-06-23
Version
2026.1 English

A set_clock_groups or a set_false_path between clocks <clock_name> and <clock_name> overrides a set_max_delay -datapath_only (refer to constraint position <#> in the Timing Constraints window in the Vivado IDE). It is not recommended to override a set_max_delay -datapath_only constraint. Replace the set_clock_groups or set_false_path between clocks with point-to-point set_false_path constraints.