Examples - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English

Find All Unplaced I/Os

  • Find: Cells
  • Properties: Primitive is IO + AND STATUS is UNPLACED

Find All Nets with a Fanout Over 10,000

  • Find: Nets
  • Properties: FLAT_PIN_COUNT > 10000

All DSPs Using the PREG Embedded Register

  • Find: Cells
  • Properties: PRIMITIVE_TYPE is ARITHMETIC.DSP + AND PREG > 0