Example - Example - 2026.1 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
Document ID
UG906
Release Date
2026-06-23
Version
2026.1 English

In the following figure, the primary clock is correctly defined on the top-level port clk_pin_p. However, a create_clock constraint is used to redefine the primary clock on the output of the input buffer control (IBUFCTRL) output. This new clock ignores all delays prior to the IBUFCTRL.

Figure 1. Invalid Primary Clock Redefinition on a Clock Tree
Page-1 Sheet.1 Process Previous primary clock defined on the clock tree Previous primary clock defined on the clock tree Sheet.3 Process.5 Primary clock defined on the clock tree Primary clock defined on the clock tree Sheet.5 Sheet.7 X15525-111715 X15525-111715