Description - Description - 2026.1 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2026-06-23
Version
2026.1 English

An intra-clock path can lack a common node between the source and destination clock pins when the clock is defined on more than one object (port, pin, or net). In this situation, the path is unsafe to time and is considered asynchronous because the source and destination clock pins are driven by different clock source pins.