You can cross-probe to the source files after the netlist design is loaded into memory for designs synthesized with Vivado synthesis.
Use the following instructions to cross-probe:
- Select the object (for example cell, hierarchical cell, net, or port).
- Select Go to Source from the popup menu, shown in the following figure.
Figure 1. Cross-Probe Back To Source
Use cross-probing to identify which source corresponds to specific gates in the netlist. Because of synthesis transformations, you cannot cross-probe every gate back to its exact source in the design.