Clock Regions Tables - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English

The Clock Regions section is available only for UltraScale™ device families. It includes several tables that show the design uses primitive and routing resources in each clock region.

In the Clock Utilization window, you can click the Show Metrics In Device Window button to select which resource types to display for each clock region in the Device view, as shown in the following figure.

Figure 1. Clock Region Resource Utilization Metrics in the Device Window

The Clock Regions section contains the following tables:

  • Clock Primitives: Shows the utilization of each clock primitive type in each clock region.
  • Load Primitives: Shows the utilization of non-clock sequential primitives in each clock region.

For both tables, the Global Clock column shows the number of global clock nets routed on the horizontal distribution layer, regardless of whether they drive loads in the region. Clock nets routed only on the vertical distribution layer, without branching into the horizontal layer, are not included. Nets routed entirely on the general-purpose routing layer are also excluded.

The global clock summary displays the number of global clocks present in each clock region, formatted to match the device’s clock region floorplan. This table is available only in the text report. The Routing Resource Summary lists the global clock routing resources used in each clock region, broken down by resource type and location.

Figure 2. Report Clock Utilization – Global Clock Summary Example