Bus Skew Report Per Constraint Section - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2025-12-10
Version
2025.2 English

The Bus Skew Report Per Constraint section provides detailed information for each set_bus_skew constraint. Each constraint includes two parts:

  • A summary of the paths covered by the constraint.
  • A list of detailed timing paths corresponding to the summary entries.

The summary table includes the following information:

From Clock
The clock domain of the startpoints
To Clock
The clock domain of the endpoints
Endpoint Pin
The endpoint pin in the reported path
Reference Pin
The reference pin used to compute the skew. Each row shows the reference pin that caused the largest skew for that endpoint
Corner
The fast or slow analysis corner used to compute the worst skew
Actual
The computed skew, calculated as the difference between the relative delay to the endpoint pin and the reference pin, minus the relative CRPR
Slack
The difference between the actual skew and the constraint requirement
Note: You must specify both the -from and -to options when defining a bus skew constraint.

By default, the report includes only the endpoint with the worst bus skew. To include more endpoints, use the -nworst and -max_paths command-line options. These options function similarly to those in the report_timing command. For example, -nworst 1 -max_paths 16 reports up to 16 endpoints per constraint, with one path per endpoint.

Figure 1. Bus Skew Report Per Constraint

The second part of the report provides a detailed timing path for each pin pair listed in the summary. The number of detailed paths matches the number of endpoints and is also controlled by the -max_paths and -nworst options.

The format of the detailed timing paths is similar to a traditional timing path report, but with a few differences:

  • Clock uncertainty is not included, because the analysis assumes the same clock edge
  • The report shows the worst-case clock uncertainty from the endpoint or reference path in the header
  • The launch time for the destination clock is always zero
  • For each slack value, the report shows both the timing path to the endpoint and the timing path to the reference pin
  • If the clock or datapath crosses multiple SLRs, Vivado applies inter-SLR compensation to reduce pessimism. The report includes this compensation in the header

If you use the -path_type short option, the report collapses the clock network details. In this format, the path to the endpoint pin appears first, followed by the path to the reference pin. The header summarizes information from both paths, the requirement, and the relative CRPR.

Figure 2. Detailed Path Example