Note: This section refers only to the place_design
command for Versal families. For other families, refer to place_design Command (7 Series and UltraScale).
The place_design
command runs
placement on the design. Like the other implementation commands, place_design
is re-entrant in nature. For a partially
placed design, the Vivado placer uses the
existing placement as the starting point instead of starting from scratch.
place_design Syntax
place_design [-directive <arg>] [-subdirective <args>] [-no_timing_driven]
[-timing_summary] [-unplace] [-no_psip] [-no_noc_opt]
[-clock_vtree_type <arg>] [-net_delay_weight <arg>]
[-quiet] [-verbose]