EDIF netlist design sources are read into memory through use of the
read_edif command. Non-Project Mode also supports an RTL design
flow, which allows you to read source files and run synthesis before implementation.
Use the read_checkpoint command to add synthesized design checkpoint
files as sources.
The read_* Tcl commands are designed for use
with Non-Project Mode. The read_* Tcl commands let
Vivado read a file on the disk and build the
in-memory design without copying the file or creating a dependency on it.
This approach makes Non-Project Mode highly flexible with regard to design.
Important: You must monitor any changes to the source design files, and update
the design as needed.