Remaps the design to improve the critical paths
in timing-driven mode by performing re-synthesis to reduce the depth of logic. This
timing-based approach replicates LUTs with fanout and collapse smaller LUTs into bigger
functions at the expense of longer optimization compile time.
Note: LUTs with BEL constraints are optimized by Resynth Remap.
To prevent optimization on LUTs with BEL constraints, add a DONT_TOUCH property with
value TRUE to the LUT.