Remaps the design to improve the critical
paths in timing-driven mode by performing re-synthesis to reduce the depth of logic.
This timing-based approach will replicate LUTs with fanout and collapse smaller LUTs
into bigger functions at the expense of longer optimization runtime.
Note: LUTs with BEL constraints will still be optimized by Resynth
Remap. To prevent optimization on LUTs with BEL constraints, add a DONT_TOUCH
property with value TRUE to the LUT.