Logic Preservation - 2024.1 English

Vivado Design Suite User Guide: Implementation (UG904)

Document ID
UG904
Release Date
2024-06-05
Version
2024.1 English

The Vivado Design Suite respects the DONT_TOUCH property during logic optimization. It does not optimize away nets or cells with these properties. To speed up the net selection process, nets with DONT_TOUCH properties are pre-filtered and not considered for physical optimization. For more information, see section Synthesis Attributes in the Vivado Design Suite User Guide: Synthesis (UG901).

You would typically apply the DONT_TOUCH property to leaf cells to prevent them from being optimized. DONT_TOUCH on a hierarchical cell preserves the cell boundary, but optimization might still occur within the cell and constants can still be propagated across the boundary. To preserve a hierarchical net, apply the DONT_TOUCH property to all net segments using the -segments option of get_nets.

The tools automatically add DONT_TOUCH properties of value TRUE to nets that have MARK_DEBUG properties of value TRUE. This is done to keep the nets intact throughout the implementation flow so that they can be probed at any design stage. This is the recommended use of MARK_DEBUG. However, on rare occasions DONT_TOUCH might be too restrictive and could prevent optimization such as constant propagation, sweep, or remap, leading to more difficult timing closure. In such cases, you can set DONT_TOUCH to a value of FALSE, while keeping MARK_DEBUG TRUE. The risk in doing this is that nets with MARK_DEBUG can be optimized away and no longer probed.