Compile time is impacted by the following factors:
- Netlist complexity and utilization
- Timing constraints and optimization
You can use the following Vivado tools features to reduce compile time:
- Multi-threading
- On multiprocessor systems, the Vivado tools use multi-threading to speed up certain processes, including DRC reporting, static timing analysis, placement, and routing. For more information, see Multithreading with the Vivado Tools.
- Generate Parallel Reports
- Allows you to generate certain reports in parallel to reduce compile time. For more information, see the generate_parallel_reports command in the Vivado Design Suite Tcl Command Reference Guide (UG835).
- Quick Directive
- Sets the absolute, fastest compile time for place and route. This directive
applies to both
place_design
androute_design
, is non-timing-driven, and performs the minimum compilation needed to place and route a design.
In addition, the performance of the compute host server is important in achieving efficient compile times, and optimizing the BIOS and CPU settings is essential for maximizing this performance. The following table outlines recommended settings for CPUs and servers, providing guidance on how to configure your system for optimal operation.
Setting | Recommendation |
---|---|
Simultaneous Multithreading (SMT) or Hyper-Threading | Enable to allow each core to handle two threads. |
Turbo Boost/Precision Boost | Enable to allow dynamic clock speed increases. |
Power Management | Set to prioritize performance over energy savings. |
Memory Configuration | Enable to run RAM at its rated speed for maximum performance. |
NUMA | Enable for optimized memory access in multi-socket systems. |
C-States | Consider disabling deeper sleep C-states to reduce latency. |
Virtualization | Disable if not using virtualization to reduce overhead. |