XDC Scoping Mechanism - XDC Scoping Mechanism - 2026.1 English - UG903

Except for ports, constraint scoping uses the current_instance mechanism from the Synopsys design constraints (SDC) standard. When you set the scope to a lower level of the hierarchy with current_instance, object queries return only objects in that level or below.

The following are exceptions:

• Timing clocks created with create_clock or create_generated_clock. They stay visible throughout the design regardless of the current instance. You can query them with get_clocks. Only define timing exceptions on clocks fully contained in the current instance. Ensure clocks are defined before referencing them in an XDC. Adjust XDC file order if needed.
• Top-level ports always returned by get_ports, not when current_instance is set to a lower level.

When reading a scoped XDC using read_xdc -ref/-cells or loading XDC files with SCOPED_TO_REF/SCOPED_TO_CELLS, the following applies:

• Use scoped‑instance interface port names with get_ports, not top‑level port names.
• If a scoped‑instance port connects directly to a top‑level port, get_ports returns the top‑level port and applies constraints there.
• If a leaf cell (I/O buffer, clock buffer, etc.) exists between the scoped port and the top‑level, get_ports becomes get_pins and returns the hierarchical instance pin.

Vivado uses the XDC scoping mechanism when reading all IP constraint files. The following figures show how get_ports commands are handled in IP‑level XDC files using this method.

In the following figure, the IP contains an I/O buffer. The IP interface pin connects directly to a top‑level port. When the IP XDC is applied, get_ports replaces the argument with the top‑level port name. This lets you set physical properties, such as LOC or IOSTANDARD, at the IP level and have them applied to the correct top‑level port. You can do this without knowing the top‑level port names in the design.

In the following figure, the IP does not contain an I/O buffer. The synthesis engine infers one between the IP interface pin and the top‑level port. When the XDC is applied, get_ports is converted to get_pins for the IP interface pin, such as a hierarchical pin.

This capability lets you create constraints on an IP or sub‑level module interface without knowing top‑level port names.

If a scoped XDC contains constraints that require top‑level ports, and the IP instance is not directly connected to them, Vivado returns errors. The following are constraints that apply only to top‑level ports:

• set_input_delay
• set_output_delay
• set_property IOSTANDARD