Timing Constraint | Physical Constraint | General Purpose |
---|---|---|
create_clock
|
|
|
Debug Constraint | ||
create_debug_core
|
||
Power Constraint | Netlist Constraint | |
|
set_logic_unconnected
|
|
Waiver Constraint | ||
create_waiver
|
||
Device Object Query | Timing Object Query | Netlist Object Query |
get_iobanks
|
all_clocks
|
all_cpus
|
get_package_pins
|
get_path_groups
|
all_dsps
|
get_sites
|
get_clocks
|
all_fanin
|
get_bel_pins
|
get_generated_clocks
|
all_fanout
|
get_bels
|
get_timing_arcs
|
all_hsios
|
get_nodes
|
get_speed_models
|
all_inputs
|
get_pips
|
Floorplan Object Query |
all_outputs
|
get_site_pins
|
all_rams
|
|
get_pblocks
|
||
get_site_pips
|
get_macros
|
all_registers
|
get_slrs
|
all_ffs
|
|
get_tiles
|
all_latches
|
|
get_wires
|
get_cells
|
|
get_pkgpin_bytegroups
|
get_nets
|
|
get_pkgpin_nibbles
|
get_pins
|
|
get_ports
|
||
get_debug_cores
|
||
get_debug_ports
|