Unsupported SDC Commands - 2024.1 English

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2024-06-15
Version
2024.1 English

The following SDC commands are not supported.

  • set_clock_gating_check
  • set_clock_transition
  • set_ideal_latency
  • set_ideal_network
  • set_ideal_transition
  • set_max_fanout
    Note: Maximum fanout is controlled by the MAX_FANOUT attribute during synthesis.
  • set_drive
  • set_driving_cell
  • set_fanout_load
  • set_input_transition
  • set_max_area
  • set_max_capacitance
  • set_max_transition
  • set_min_capacitance
  • set_port_fanout_number
  • set_resistance
  • set_timing_derate
  • set_voltage
  • set_wire_load_min_block_size
  • set_wire_load_mode
  • set_wire_load_model
  • set_wire_load_selection_group
  • create_voltage_area
  • set_level_shifter_strategy
  • set_level_shifter_threshold
  • set_max_dynamic_power
  • set_max_leakage_power