Primary Clocks - Primary Clocks - 2026.1 English - UG903

The wizard identifies two categories of clocks, as shown in the following figure.

Recommended Constraints

Lists the primary clocks you need to compute timing slack for setup, hold, recovery, and removal checks.

Constraints for Pulse Width Check Only

Lists clocks used exclusively for pulse width checks: min_period, max_period, max_skew, min_low_pulse_width, and min_high_pulse_width.

By default, the clocks in this table remain unchecked because they are used only for reporting and do not affect implementation tool results.

The wizard automatically identifies the correct clock source point for your constraint. In most designs, that source point is an input clock port. In specific cases, it is a primitive output without a timing arc.

For example, for 7 series devices, the wizard identifies missing primary clocks on GT_CHANNEL outputs. In AMD UltraScale™ devices, Vivado auto-derives GT_CHANNEL output clocks from incoming clock characteristics, GT_CHANNEL configuration, and connectivity. In this case, the wizard recommends placing primary clocks upstream from the GT_CHANNEL cells at the design boundary.