Multicycles Between FAST-to-SLOW Clocks - Multicycles Between FAST-to-SLOW Clocks - 2026.1 English - UG903

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2026-07-01
Version
2026.1 English

In this scenario, set CLK1 as the fast launch clock and CLK2 as the slow capture clock.

Figure 1. Multicycles Between FAST-to-SLOW Clocks

In the next example, use fast CLK1 to launch and slow CLK2 to capture. Assume CLK1 runs at three times CLK2.

Figure 2. Multicycles Between FAST-to-SLOW Clocks

When no multicycle applies, the STA tool resolves default setup and hold relationships.

Figure 3. Default Setup and Hold Relationships