The Timing Constraints wizard identifies logically exclusive clocks that have timing paths between each other beyond the logic connected to the shared clock tree.
For example, clkA and clkB share part of a clock tree
and have a timing path from the shared clock tree to clkA alone.
Because only the clock domain crossing paths of the shared clock tree must be ignored, the wizard recommends to create generated clocks that are copies of clkA and clkB but that only exist on the shared clock tree. The clock groups constraint is applied to the generated clocks only, so that the paths outside the logic of the shared clock tree can still be normally timed. The following figure shows the wizard’s recommended constraints for the previous example.