Limitations - Limitations - 2026.1 English - UG903

• You can only rename auto-derived clocks at their point of origin, such as the output pin of a clock-modifying block (PLL, MMCM, etc.). For example, you cannot rename an auto-derived clock at the output of a BUFG, even if the clock propagates through it.
• You cannot rename primary clocks or user-defined generated clocks, only auto-derived clocks support this renaming mechanism.
• The source_object must match the object where the auto-derived clock is created.

The tool returns an error if it cannot rename the generated clock. The master clock must exist when you perform the renaming. You can rename auto-derived clocks at any point in the XDC, even after other timing constraints have referenced them. For example, the report_clocks output below shows a generated clock at the output pins of an MMCM:

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Generated Clocks
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Generated Clock	: clkfbout_clk_core
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKFBOUT}

Generated Clock	: clk_rx_clk_core
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT0}

Generated Clock	: clk_tx_clk_core
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Edges	: {1 2 3}
Edge Shifts	: {0.000 0.500 1.000}
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT1}

The following three commands rename the auto-derived clocks at the output of the MMCM:

create_generated_clock -name clk_rx [get_pins clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT0] 
create_generated_clock -name clk_tx [get_pins clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT1] 
create_generated_clock -name clkfbout [get_pins clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKFBOUT]

After renaming, the report_clocks command shows the following output:

====================================================
Generated Clocks
====================================================
Generated Clock	: clkfbout
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKFBOUT}

Generated Clock	: clk_rx
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT0}

Generated Clock	: clk_tx
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Edges	: {1 2 3}
Edge Shifts	: {0.000 0.500 1.000}
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT1}