Input jitter is the difference between successive clock edges relative to
ideal arrival times. Treat it as an absolute value that varies on either side of the
edge. Use set_input_jitter to specify input jitter for each primary
clock individually. You cannot set input jitter directly on a generated clock. The
timing engine computes the jitter that a generated clock inherits from its master
clock.
- If an MMCM or PLL drives the generated clock, the engine replaces input jitter with computed discrete jitter.
- If a combinational or sequential cell creates the generated clock, it inherits its master clock jitter.