Example Six: Forwarded Clock Driven by ODDR - 2024.1 English

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2024-06-15
Version
2024.1 English

In this example, a forwarded clock is created on the output port driven by an ODDR cell. The forwarded clock references the master clock driving the ODDR/CLKDIV pin and has the same period as the master clock (-divide_by 1):

create_generated_clock -name ck_vsf_clk_2 \
-source [get_pins ODDRE1_vsfclk2_inst/CLKDIV] -divide_by 1 [get_ports vsf_clk_2]
Figure 1. Example of Forwarded Clock