Disabling Timing Arcs - Disabling Timing Arcs - 2026.1 English - UG903

You can disable timing arcs inside the cell with the set_disable_timing command. Only timing arcs going from input to output ports of a cell can be disabled.

Some timing arcs are automatically disabled by the timing engine to handle specific scenarios. For example, combinational feedback loops are not recommended and cannot be timed properly. The timer breaks such loops by disabling one of the timing arcs inside the loop.

Another example is when a case analysis is set on a multiplexer. By default, all data inputs of a MUX propagate to the output. When case analysis is applied to the select signals, only one data input is allowed to propagate. The timing engine disables arcs from the other data inputs to the output to reflect this.

Use the set_disable_timing command to manually disable timing arcs in your design. This gives you control over which arc to disable in a feedback loop, rather than letting the tool choose. You can also use this command when multiple clocks drive the input pins of a LUT but only one clock propagates to the output. Disabling the arcs from the unwanted clocks prevents them from being analyzed.

A common scenario involves LUTRAM. Inside a LUTRAM, a physical path exists from the WCLK pin to the output O pin, connecting write and read clocks. In asynchronous FIFO designs based on LUTRAM, this clock domain crossing from WCLK to O cannot occur by construction. However, the timing arc is enabled by default, and the timer can report false paths or trigger TIMING-10 DRC violations. In this case, disable the WCLK to O timing arc to prevent invalid paths from being timed or reported. This arc is automatically disabled in AMD’s current implementation of LUTRAM-based FIFOs.

The syntax for the set_disable_arc command is:

set_disable_timing [-from <name>] [-to <name>] [-quiet] [-verbose] <objects>

Use pin names only for the -from and -to options. These pin names must match those of the library cell, not design-level pin names. For example:

set_disable_timing -from WCLK -to O [get_cells inst_fifo_gen/ gdm.dm/gpr1.dout_i_reg[*]]

This command disables the WCLK to O timing arcs for all LUTRAM-based asynchronous FIFOs under the specified hierarchy inst_fifo_gen/ gdm.dm/gpr1.dout_i_reg[*].

The -from and -to options are optional:

• If only -to is specified, all arcs ending on that pin are disabled.
• If only -from is specified, all arcs starting from that pin are disabled.
• If neither is specified, all timing arcs on the specified cells are disabled.

report_disable_timing -file disabled_arcs.rpt