Defining Sets of Design Elements - 2024.1 English

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2024-06-15
Version
2024.1 English

Define sets of design elements with U Set (U_SET) or HU Set (HU_SET) constraints.

  • Each element of the set is placed in relation to the other elements of the set by Relative Location (RLOC) constraints.
  • Logic elements with RLOC constraints and common set names are associated in an RPM.

U_SET, HU_SET, and RLOC constraints:

  • Must be defined as properties in the HDL design files.
  • Are not supported in Xilinx Design Constraints format (XDC).
Tip: You can use the create_macro and update_macro commands to define macro objects in the AMD Vivado™ Design Suite, that act like RPMs within the design. Refer to XDC Macros.

For more information on U_SET, HU_SET, and RLOC constraints, see the Vivado Design Suite Properties Reference Guide (UG912).