Dedicated Hardware Resources - Dedicated Hardware Resources - 2026.1 English - UG903

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2026-07-01
Version
2026.1 English

The dedicated hardware resources of AMD FPGAs efficiently support a large number of design clocks. An external board component usually generates these clocks. These clocks usually enter the device through an input port.

You can also generate clocks using special primitives called clock modifying blocks (CMBs), such as:

  • MMCM
  • PLL
  • BUFR

You can also transform clocks using regular cells such as LUTs and registers. The following sections describe how to define clocks based on where they originate.