Constraint Files Order with IP Cores - Constraint Files Order with IP Cores - 2026.1 English - UG903

Vivado Design Suite User Guide: Using Constraints (UG903)
Document ID
UG903
Release Date
2026-07-01
Version
2026.1 English

Many IP cores include one or more XDC files. When you generate them in an RTL project, their XDC files guide compilation steps.

Figure 1. XDC Files in the IP Sources

By default, Vivado reads IP XDC files before user XDC files. This lets IPs create clock objects and allows you to overwrite their physical constraints.

There is an exception when an IP core depends on clock objects created by the user or another IP, such as:
get_clocks -of_objects [get_ports clka]

In this case, Vivado reads the IP XDC after user files. The PROCESSING_ORDER property sets read order: EARLY, NORMAL, or LATE.

  • EARLY: Files that must be read first
  • NORMAL: Default setting
  • LATE: Files that must be read last

An IP XDC has its PROCESSING_ORDER property set to either EARLY or LATE. No IP delivers XDC files in the NORMAL constraints group. For user XDC or Tcl files in the same PROCESSING_ORDER group, the order in the Vivado IDE determines the read sequence. You can change the order within the group by moving the files in the constraints set or by using the reorder_files command.

For IP XDC files in the same PROCESSING_ORDER group, the order is set by the import or creation sequence of the IP cores and cannot be changed after the project is created.

The relative order between user and IP XDC PROCESSING_ORDER groups is:

  1. User constraints marked as EARLY
  2. IP constraints marked as EARLY (default)
  3. User constraints marked as NORMAL
  4. IP constraints marked as LATE (contain clock dependencies)
  5. User constraints marked as LATE
Note: IP XDC files with PROCESSING_ORDER set to LATE so they are processed after user constraints are named <IP_NAME>_clocks.xdc.
Figure 2. Setting the XDC File PROCESSING_ORDER Example

Use the following Tcl command to set the PROCESSING_ORDER property:
set_property PROCESSING_ORDER EARLY [get_files wave_gen_pins.xdc]
Recommended: Run the report_compile_order -constraints command in the Tcl Console to view the XDC read sequence determined by the tool. This report reflects the properties described above, including IS_ENABLED, USED_IN_SYNTHESIS, and USED_IN_IMPLEMENTATION.
Note: When you synthesize an IP OOC, it provides an _ooc.xdc file with the default clock definition. The tool sets the USED_IN property to "synthesis out_of_context implementation." The order does not matter, because during OOC synthesis, the tool processes the _ooc.xdc file before all other constraints.