Additional Clock Uncertainty - Additional Clock Uncertainty - 2026.1 English - UG903

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2026-07-01
Version
2026.1 English

Use set_clock_uncertainty command to define extra clock uncertainty for specific corners, delay types, or clock relationships. This adds timing margin to targeted areas.

The inter-clock uncertainty takes precedence over simple clock uncertainty, regardless of constraint order. In the example below, you set 1.0 ns on clk1, but paths from clk1 to clk2 use 2.0 ns.

set_clock_uncertainty 2.0 -from [get_clocks clk1] -to [get_clocks clk2] 
set_clock_uncertainty 1.0 [get_clocks clk1]

When you define inter-clock uncertainty between two domains, constrain both directions:

  • clk1 to clk2
  • clk2 to clk1