Apply clock domain crossing (CDC) constraints to paths with different launch and capture clocks. CDCs can be synchronous or asynchronous, depending on clock relationships and timing exceptions. For example, CDC paths between synchronous clocks covered by false paths are not timed, so they are treated as asynchronous CDCs.
Asynchronous CDC paths can be safe or unsafe. This terminology differs from
inter-clock timing analysis in report_clock_interaction.
Consider an asynchronous CDC path safe when it uses synchronization circuitry that
prevents capture-stage metastability.
For more details, refer to Report Clock Domain Crossings in the Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906).
The timing analysis of CDC paths can be fully ignored by using the set_false_path or set_clock_groups
constraints, or partially analyzed by using set_max_delay
-datapath_only. In addition, the multi-bit CDC paths capture time spread
can be constrained using the set_bus_skew
constraint.