XDC Syntax Example - 2025.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2025-12-05
Version
2025.2 English

MARK_DEBUG can be applied to hierarchical pins, nets, and elaborated sequential cells like RTL_REG. Use the get_nets and get_pins commands as shown, for example:

set_property MARK_DEBUG true [get_nets -of [get_pins hier1/hier2/<flop_name>/Q]]

This recommended use ensures that the MARK_DEBUG goes onto the net connected to that pin, regardless of its name.

Note: Applying MARK_DEBUG to a bit of a signal declared as a bit_vector assigns the MARK_DEBUG attribute to the whole bus. In addition, if a MARK_DEBUG is placed on a pin of a hierarchy, the full hierarchy is kept.