VHDL User-Defined Enumerated Types - VHDL User-Defined Enumerated Types - 2026.1 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)
Document ID
UG901
Release Date
2026-07-08
Version
2026.1 English

You can create your own enumerated types. User-defined enumerated types usually describe the states of a finite state machine (FSM).