VHDL Example on Architecture - VHDL Example on Architecture - 2026.1 English

VHDL Example on Architecture - VHDL Example on Architecture - 2026.1 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID

UG901

Release Date

2026-07-08

Version

2026.1 English

architecture rtl of test is
attribute dont_touch : string;
attribute dont_touch of rtl : architecture is "yes";