VHDL Combinatorial Circuits - VHDL Combinatorial Circuits - 2026.1 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2026-07-08
Version
2026.1 English

You describe combinational logic using concurrent signal assignments in the body of an architecture. You can describe as many concurrent signal assignments as are necessary; the order of appearance of the concurrent signal assignments in the architecture is irrelevant.