USE_DSP VHDL Example - USE_DSP VHDL Example - 2026.1 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)
Document_ID
UG901
Release_Date
2026-07-08
Version
2026.1 English
attribute use_dsp : string;
attribute use_dsp of P_reg : signal is "no"