ROM_STYLE Verilog Example - ROM_STYLE Verilog Example - 2026.1 English

ROM_STYLE Verilog Example - ROM_STYLE Verilog Example - 2026.1 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID

UG901

Release Date

2026-07-08

Version

2026.1 English

(* rom_style = "distributed" *) reg [data_size-1:0] myrom [2**addr_size-1:0];