RAM_DECOMP - 2025.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2025-12-05
Version
2025.2 English

RAM_DECOMP controls the implementation style of a memory array requiring multiple block RAM primitives.

For example, synthesis tools often configure a RAM specified as 2K x 36 as two 2K x 18 block RAMs arranged side by side. This configuration yields the fastest design. Setting RAM_DECOMP = "power" configures the RAM as two 1K x 36 block RAMs. This reduces power because, during a read or write, only the RAM with the addressed location is active. It comes at the cost of timing because Vivado synthesis must use address decoding.

The RAM_DECOMP forces the second configuration of that RAM. Alternatively, a value of area forces the configuration to be as small of an area as possible. This can also be a change from the fastest design.

The values accepted for RAM_DECOMP are "power and area".

You can set this attribute either in the RTL or XDC. Place the attribute on the RAM instance itself.