RAM_DECOMP VHDL Example - RAM_DECOMP VHDL Example - 2026.1 English

RAM_DECOMP VHDL Example - RAM_DECOMP VHDL Example - 2026.1 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID

UG901

Release Date

2026-07-08

Version

2026.1 English

attribute ram_decomp : string;
attribute ram_decomp of myram : signal is "power";