Example with Custom Attribute on Hierarchy (VHDL) - 2025.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2025-12-05
Version
2025.2 English
attribute my_att : string;
attribute my_att of beh : architecture is "my_value"
attribute DONT_TOUCH : string;
attribute DONT_TOUCH of beh : architecture is "yes";

Be careful while using custom attributes on signals as well. When the synthesis tool encounters a custom attribute on a signal, it attempts to attach the attribute to the corresponding item. Depending on how the tool evaluates the RTL, it can translate that item into a register or a net. Also, as with hierarchies, the tool can optimize a signal that has a custom attribute. When it does, the tool discards the attribute. To retain custom attributes on signals with custom attributes, you must place the DONT_TOUCH or the KEEP attribute on those signals.

Finally, because a signal in RTL describes both a register and the net coming out of the register, the synthesis tool checks any items with custom attributes and the DONT_TOUCH attribute. When a register drives a net, the synthesis tool copies the custom attribute to both the register and the net. This behavior occurs because tools support multiple ways of using custom attributes. Sometimes, the attribute is wanted on the register, and sometimes the net.