CRITICAL_SIG_OPT Verilog Example - CRITICAL_SIG_OPT Verilog Example - 2026.1 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document_ID
UG901
Release_Date
2026-07-08
Version
2026.1 English
(* CRITICAL_SIG_OPT = “true” *)  reg [3 : 0]  signal_name;