CRITICAL_SIG_OPT Verilog Example - 2024.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2024-12-11
Version
2024.2 English
(* CRITICAL_SIG_OPT = “true” *)  reg [3 : 0]  signal_name;