Assigning an Initial Value to a Register - 2025.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2025-12-05
Version
2025.2 English

Assign a set/reset (initial) value to a register.

  • Assign the value to the register when the register reset line goes to the appropriate value. See the following coding example.
  • When you assign the initial value to a variable:
    • A Flip-Flop implements the value with a local reset controlling its output.
    • The Verilog file carries the value in an FDP or FDC Flip-Flop.