In VHDL-2019, integer types are 64-bit instead of 32-bit. This is automatic and the RTL does not need to be changed to take advantage of this.
Additional VHDL-2019 Support:
- Conditional expressions for initialization
- Conditional return statements
- Partial connections in port maps
- textio package: file API
- env package: date and time API
- Reflection package: 'reflect attribute and mirrors
- Composite datatypes: to_string and 'image
- Protected types in arrays and records
- Attributes of enumerated types
- Anonymous types
- Range expressions
- Impure functions on input or output ports