Xcelium Simulator Simulation Options - Xcelium Simulator Simulation Options - 2026.1 English - UG900

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document_ID
UG900
Release_Date
2026-07-08
Version
2026.1 English
Table 1. Xcelium Simulator Simulation Options
Option Description
xcelium.simulate.tcl.post Specify post-simulate step Tcl hook
xcelium.simulate.runtime Specify simulation run time
xcelium.simulate.log_all_signals Log all signals
xcelium.simulate.update Check if unit is up-to-date before writing
xcelium.simulate.ieee_warnings Suppress IEEE warnings
xcelium.simulate.saif Specify design hierarchy instance name for which power estimation is desired
xcelium.simulate.saif_scope SAIF filename
xcelium.simulate.xmsim.more_options More XMSIM simulation options