Vivado Simulator VHDL Data Format - 2025.2 English - UG900

Vivado Design Suite User Guide: Logic Simulation (UG900)
Document ID
UG900
Release Date
2025-12-17
Version
2025.2 English

This section describes how to convert between VHDL values and the format of the memory buffers to use with the XSI functions xsi_get_value and xsi_put_value.