Using Simulation Settings - 2025.2 English - UG900

You can use the Settings menu to view or specify the following simulation settings:

• Target simulator
• Simulator language
• Simulation set
• Simulation top module name
• Tabbed listing of compilation, elaboration, simulation, netlist, and advanced options

From the Vivado IDE Flow Navigator, right-click Simulation and select Simulation Settings to open the Simulation Settings in the Settings dialog box. See the following figure.

Figure 1. Settings Dialog Box

The Settings dialog box includes the following simulation settings:

Target simulator

From the simulator drop-down menu, select a simulator. AMD Vivado™ simulator is the default simulator. However, many third-party simulators are also supported.

Simulator language

Select the simulator language mode. The simulation model used for various IPs in your design varies depending on what language the IP supports.

Simulation set

Select the simulation set that the simulation commands use by default.

Important: The compilation and simulation settings for a previously defined simulation set are not applied to a newly-defined simulation set.

Simulation top module name

Enter an alternate top module to use during simulation.

Generate simulation scripts only

Generates scripts if selected. Simulation is not invoked.

Configure script to run simulator in GUI mode

Launch simulator GUI in scripts-only mode if selected.

Compiled library location

This option is displayed when you select a third-party simulator. This directory serves as the location from which the simulator accesses compiled libraries. To support this, explicitly define the path where libraries are compiled by using the comb_simlib command.

Compilation tab

This tab defines and manages compiler directives, which are stored as properties on the simulation fileset. These are used by the xvlog and xvhdl utilities to compile Verilog and VHDL source files for simulation.

Note: xvlog and xvhdl are Vivado simulator specific commands. The applicable utilities change based on the target simulator.

Elaboration tab

This tab defines and manages elaboration directives, which are stored as properties on the simulation fileset. These are used by the xelab utility for elaborating and generating a simulation snapshot. Select a property in the table to display a description of the property and edit the value.

Note: xelab is a Vivado simulator specific command. The applicable utilities change based on the target simulator.

Simulation tab

This tab defines and manages simulation directives, which are stored as properties on the simulation fileset. These are used by the xsim application for simulating the current project. Select a property in the table to display a description of the property and edit the value.

Netlist tab

This tab has netlist configuration options related to the SDF annotation of the Verilog netlist and the process corner captured by SDF delays. These options are stored as properties on the simulation fileset and are used while writing the netlist for simulation.

Advanced tab

This tab contains two options:

Enable incremental compilation

This option enables incremental compilation and preserves the simulation files during successive simulation runs. This option is enabled by default.

Include all design sources for simulation

By default, this option is enabled. Selecting this option ensures that all the files from design sources along with the files from the current simulation set is used for simulation. Even if you change the design sources, the same changes are updated when you launch the behavioral simulation.

CAUTION:

Change the settings in the Advanced tab only if necessary.

The Include all design sources for simulation check box is enabled by default. Disabling this check box can produce unexpected results. When this check box enabled, the simulation set includes Out-of-Context (OOC) IP, IP integrator files, and DCP.

Note: For detailed information on the Compilation, Elaboration, Simulation, Netlist, and Advanced tabs options, see Compilation, Elaboration, Simulation, Netlist, and Advanced Options.